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CDB5581
APPENDIX A. MAXIMIZING THE PERFORMANCE OF THE CS5581
A.1
A.2
PCB Layout Considerations
? Keep the signal path short between the CS5581 ADC input capacitors C37, C44 and the ADC
input pin to minimize trace inductance.
? The analog input buffer amplifiers and ADC input buffer capacitors are placed before the multi-
plexer. Placing the buffer amplifiers before the multiplexer allows the amplifiers driving the ADC
buffer capacitors to be fully settled when sampled by the ADC. Therefore, the multiplexer must
be of a low on-resistance type to prevent distortion or latency issues.
? Power supply noise is a major design consideration and the power supplies need adequate
bypassing and bulk capacitance.
? When operating the ADC from +2.5 V and -2.5 V split supplies, place the power supply & buffer
amplifier bypass capacitor ground connections close together.
? Keep all ground connections on each differential buffer amplifier as close to the device as pos-
sible to avoid introducing differential noise through high-impedance connections.
? Keep trace lengths short between the ADC and the voltage reference IC negative supply pins.
? Route the oscillator output away from analog circuitry.
? Use a solid ground plane in the PCB layout.
? Provide adequate separation between analog and digital signals.
? To minimize distortion within the analog signal path, consider using components with smaller
voltage dependencies.
? Minimize ADC digital output edge transition current loading.
Hardware Considerations
At a system level, use shielded cable for interconnects. Keep interconnect cable lengths as short as pos-
sible. Route analog and digital signals connecting to the PCB away from each other.
DS796DB3
9
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